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Quantum-dot cellular automata (QCA) 2

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Predication of discharge coefficient of cylindrical weir-gate using adaptive neuro fuzzy inference systems

Abbas PARSAIE,Amir Hamzeh HAGHIABI,Mojtaba SANEIE,Hasan TORABI

Frontiers of Structural and Civil Engineering 2017, Volume 11, Issue 1,   Pages 111-122 doi: 10.1007/s11709-016-0354-x

Abstract: Weir-gate is a combination of weir and gate structures which solves them Infirmities.improve their performance, investigators have proposed cylindrical shape to improve the performance of weir-gatestructure and call it cylindrical weir-gate.In this research, discharge coefficient of weir-gate was predicated using adaptive neuro fuzzy inferenceof gate opening height to the diameter of weir are the most effective parameters on discharge coefficient

Keywords: weir-gate     soft computing     crest geometry     circular crest weir     cylindrical shape    

Development of 8-inch Key Processes for Insulated-Gate Bipolar Transistor Article

Guoyou Liu,Rongjun Ding,Haihui Luo

Engineering 2015, Volume 1, Issue 3,   Pages 361-366 doi: 10.15302/J-ENG-2015043

Abstract: well as the fourth-generation high-voltage double-diffused metal-oxide semiconductor (DMOS+) insulated-gatebipolar transistor (IGBT) technology and the fifth-generation trench gate IGBT technology, have been

Keywords: insulated-gate bipolar transistor (IGBT)     high power density     trench gate     8-inch     rail transportation    

Design of a novel RTD-based three-variable universal logic gate

Mao-qun YAO,Kai YANG,Cong-yuan XU,Ji-zhong SHEN

Frontiers of Information Technology & Electronic Engineering 2015, Volume 16, Issue 8,   Pages 694-699 doi: 10.1631/FITEE.1500102

Abstract: The threshold logic gate has attracted much attention because of its powerful logic function.The resonant tunneling diode (RTD) is well suited for implementing the threshold logic gate because ofOn this basis, a novel three-variable universal logic gate (ULG3) is proposed, composed of two RTD-baseduniversal threshold logic gates (UTLG) and an RTD-based three-variable XOR gate (XOR3).Thus, the proposed ULG3 provides a new efficient universal logic gate to implement RTD-based arbitrary

Keywords: Resonant tunneling diode (RTD)     Threshold logic gate     Reed-Muller expansion     Universal logic gate    

A prediction formula of water temperature released from the multi-level stop-log gate intake of hydropower

Gao Xueping,Chen Hong,Song Huifang

Strategic Study of CAE 2011, Volume 13, Issue 12,   Pages 63-67

Abstract:

In thermally stratified reservoir, a multi-level intake structure is usually adopted in hydropower station to reduce the negative effect of releasing lower-temperature water to the environment in downstream reach. And a simple and practical formula of water temperature released is need. In this paper, based on Nuozhadu Hydropower Station, a model test is conducted to model the thermal stratification of this reservoir, and measure the temperature of water released from the intake structure. A prediction formula of water temperature released is put forward based on the experimental data. The formula is validated by the experimental results of water temperature released from the intakes of Jinping No.1 Hydropower Station.

Keywords: thermally stratified reservoir     hydropower station intake     stop-log gate     formula of water temperature    

Frequency-controlable sine signal based on PWM and its implementation on FPGA

Lianzhen HUANG, Jiangang LI, Dongjun ZHANG

Frontiers of Mechanical Engineering 2012, Volume 7, Issue 3,   Pages 322-328 doi: 10.1007/s11465-012-0312-9

Abstract: be generated by the different Pulse-Width Modulation (PWM) signals generated by Field-Programmable Gate

Keywords: Pulse-Width Modulation (PWM)     Field-Programmable Gate Array (FPGA)     frequency controllable    

Suitable Weir Heights to Improve the Provision of Environmental Flows in Urban Rivers Article

Yuanyuan Sun, Xin’an Yin, Xianqiang Mao, Enze Zhang, Yanwei Zhao

Engineering 2021, Volume 7, Issue 2,   Pages 187-194 doi: 10.1016/j.eng.2020.05.022

Abstract: among water users and inadequate execution of designed e-flow supply plans, we propose that designing weirWe establish a new weir height determination framework that would more effectively satisfy the requiredThe old framework specified too-high weir height to meet the e-flow requirements, whereas the new framework

Keywords: Environmental flow     Urban rivers     River restoration    

Two-step gate-recess process combining selective wet-etching and digital wet-etching for InAlAs/InGaAs Article

Ying-hui ZHONG, Shu-xiang SUN, Wen-bin WONG, Hai-li WANG, Xiao-ming LIU, Zhi-yong DUAN, Peng DING, Zhi JIN

Frontiers of Information Technology & Electronic Engineering 2017, Volume 18, Issue 8,   Pages 1180-1185 doi: 10.1631/FITEE.1601121

Abstract: A two-step gate-recess process combining high selective wet-etching and non-selective digital wet-etchingSelective wet-etching is validated in the gate-recess process of InAlAs/InGaAs InP-based HEMTs, whichThe two-step gate-recess etching technique has been successfully incorporated into device fabricationsuperior extrinsic transconductance and RF characteristics to devices fabricated during only the selective gate-recessetching process because of the smaller gate to channel distance.

Keywords: High electron mobility transistors (HEMTs)     Gate-recess     Digital wet-etching     Selective wet-etching    

Fuzzy Extension Economy Control with the Restriction of Multi-dimension Jieke

Li Hua,Liu Feng,He Zhongxiong

Strategic Study of CAE 2001, Volume 3, Issue 8,   Pages 51-57

Abstract: In order to find the best jieke and jie-gate, the extension force can be used.

Keywords: complex large scale system     FEES     jieke     impact jie-gate     extension    

A MEMS Micro Force Sensor Based on a Laterally Movable Gate Field-Effect Transistor (LMGFET) with a Novel Article

Wendi Gao, Zhixia Qiao, Xiangguang Han, Xiaozhang Wang, Adnan Shakoor, Cunlang Liu, Dejiang Lu, Ping Yang, Libo Zhao, Yonglu Wang, Jiuhong Wang, Zhuangde Jiang, Dong Sun

Engineering 2023, Volume 21, Issue 2,   Pages 61-74 doi: 10.1016/j.eng.2022.06.018

Abstract:

This paper presents the development of a novel micro force sensor based on a laterally movable gateA novel sandwich structure consisting of a gold cross-axis decoupling gate array layer and two soft photoresistiveexhibits a sensitivity of 4.65 µA·nN−1, which is comparable with vertically movable gate

Keywords: Force sensor     Laterally movable gate     Field-effect transistor     Photoresistive SU-8     Biomedical micromanipulation    

Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication

Jadav Chandra DAS,Debashis DE

Frontiers of Information Technology & Electronic Engineering 2016, Volume 17, Issue 3,   Pages 224-236 doi: 10.1631/FITEE.1500079

Abstract: QCA-based designs of the reversible low-power odd parity generator and odd parity checker using the Feynman gateThe proposed QCA Feynman gate outshines the existing ones in terms of area, cell count, and delay.

Keywords: Quantum-dot cellular automata (QCA)     Parity generator     Parity checker     Feynman gate     Nanocommunication    

An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending Research Articles

Ayoub SADEGHI, Nabiollah SHIRI, Mahmood RAFIEE, Mahsa TAHGHIGH

Frontiers of Information Technology & Electronic Engineering 2022, Volume 23, Issue 6,   Pages 950-965 doi: 10.1631/FITEE.2100432

Abstract: The proposed FA, TG-based AND gate, and hybrid half adder (HA) generate :3 (4≤≤7) digital s with

Keywords: Full adder     Transmission gate     Counter     Multiplier     Three-dimensional layout     Image blending    

Dynamic power-gating for leakage power reduction in FPGAs Research Article

Hadi JAHANIRAD,h.jahanirad@uok.ac.ir

Frontiers of Information Technology & Electronic Engineering 2023, Volume 24, Issue 4,   Pages 582-598 doi: 10.1631/FITEE.2200084

Abstract: devices have become widespread in electronic systems due to their low design costs and reconfigurability. In battery-restricted applications such as handheld electronics systems, low-power FPGAs are in great demand. almost equals dynamic power in modern integrated circuit technologies, so the reduction of leads to significant energy savings. We propose a power-efficient architecture for static random access memory (SRAM) based FPGAs, in which two modes (active mode and sleep mode) are defined for each module. In sleep mode, ultra-low is consumed by the module. The module mode changes dynamically from sleep mode to active mode when module outputs evaluate for new input vectors. After producing the correct outputs, the module returns to sleep mode. The proposed circuit design reduces the consumption in both active and sleep modes. The proposed low-leakage FPGA architecture is compared with state-of-the-art architectures by implementing Microelectronics Center of North Carolina (MCNC) benchmark circuits on FPGA-SPICE software. Simulation results show an approximately 95% reduction in consumption in sleep mode. Moreover, the total power consumption (leakage+dynamic power consumption) is reduced by more than 15% compared with that of the best previous design. The average area overhead (4.26%) is less than those of other designs.

Keywords: Field programmable gate array (FPGA)     Leakage power     Power-gating     Transistor-level circuit design    

Viscoelasticity of Water-stop Rubber Based onThree-parametric Rheology Model

Liu Lihua,Xiong Wei,Zhang Hongzhi,Zhang Qingjiang

Strategic Study of CAE 2007, Volume 9, Issue 8,   Pages 69-71

Abstract:  Combining the viscoelastic test of some high-head gate water-stop materials,  the rheology

Keywords: high-head gate     rubber     viscoelasticity     rheology    

A driving pulse edge modulation technique and its complex programming logic devices implementation

Xiao CHEN,Dong-chang QU,Yong GUO,Guo-zhu CHEN

Frontiers of Information Technology & Electronic Engineering 2015, Volume 16, Issue 12,   Pages 1088-1098 doi: 10.1631/FITEE.1500111

Abstract: This paper describes a new technique of driving pulse edge modulation for insulated gate bipolar transistorsthe density and width of the pulse trains, without regulating the hardware circuit, the slope of the gate

Keywords: Driving pulse edge modulation     Switching voltage spike     Complex programmable logic device (CPLD)     Active gate    

Reversible binary subtractor design using quantumdot-cellular automata Article

Jadav Chandra DAS, Debashis DE

Frontiers of Information Technology & Electronic Engineering 2017, Volume 18, Issue 9,   Pages 1416-1429 doi: 10.1631/FITEE.1600999

Abstract: In this paper we describethe design and implementation of a DG gate in QCA.The universal natureof the DG gate has been established.The QCA building block of theDG gate is used to achieve new reversible binary subtractors.

Keywords: Quantum dot-cellular automata (QCA)     Reversible logic     DG gate     Binary subtractor     Quantum cost    

Title Author Date Type Operation

Predication of discharge coefficient of cylindrical weir-gate using adaptive neuro fuzzy inference systems

Abbas PARSAIE,Amir Hamzeh HAGHIABI,Mojtaba SANEIE,Hasan TORABI

Journal Article

Development of 8-inch Key Processes for Insulated-Gate Bipolar Transistor

Guoyou Liu,Rongjun Ding,Haihui Luo

Journal Article

Design of a novel RTD-based three-variable universal logic gate

Mao-qun YAO,Kai YANG,Cong-yuan XU,Ji-zhong SHEN

Journal Article

A prediction formula of water temperature released from the multi-level stop-log gate intake of hydropower

Gao Xueping,Chen Hong,Song Huifang

Journal Article

Frequency-controlable sine signal based on PWM and its implementation on FPGA

Lianzhen HUANG, Jiangang LI, Dongjun ZHANG

Journal Article

Suitable Weir Heights to Improve the Provision of Environmental Flows in Urban Rivers

Yuanyuan Sun, Xin’an Yin, Xianqiang Mao, Enze Zhang, Yanwei Zhao

Journal Article

Two-step gate-recess process combining selective wet-etching and digital wet-etching for InAlAs/InGaAs

Ying-hui ZHONG, Shu-xiang SUN, Wen-bin WONG, Hai-li WANG, Xiao-ming LIU, Zhi-yong DUAN, Peng DING, Zhi JIN

Journal Article

Fuzzy Extension Economy Control with the Restriction of Multi-dimension Jieke

Li Hua,Liu Feng,He Zhongxiong

Journal Article

A MEMS Micro Force Sensor Based on a Laterally Movable Gate Field-Effect Transistor (LMGFET) with a Novel

Wendi Gao, Zhixia Qiao, Xiangguang Han, Xiaozhang Wang, Adnan Shakoor, Cunlang Liu, Dejiang Lu, Ping Yang, Libo Zhao, Yonglu Wang, Jiuhong Wang, Zhuangde Jiang, Dong Sun

Journal Article

Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication

Jadav Chandra DAS,Debashis DE

Journal Article

An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending

Ayoub SADEGHI, Nabiollah SHIRI, Mahmood RAFIEE, Mahsa TAHGHIGH

Journal Article

Dynamic power-gating for leakage power reduction in FPGAs

Hadi JAHANIRAD,h.jahanirad@uok.ac.ir

Journal Article

Viscoelasticity of Water-stop Rubber Based onThree-parametric Rheology Model

Liu Lihua,Xiong Wei,Zhang Hongzhi,Zhang Qingjiang

Journal Article

A driving pulse edge modulation technique and its complex programming logic devices implementation

Xiao CHEN,Dong-chang QU,Yong GUO,Guo-zhu CHEN

Journal Article

Reversible binary subtractor design using quantumdot-cellular automata

Jadav Chandra DAS, Debashis DE

Journal Article