2008, Volume 10, Issue 2
Strategic Study of CAE >> 2008, Volume 10, Issue 2
A High Accurate Steady-state Physical Model for High-voltage VDMOS
National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China
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Abstract
A high accurate steady-state physical model for high-voltage VDMOS is proposed in the paper. In the model, a more proper assumption result in obtaining both the electric field and the voltage in the double diffused channel region by analytical method; and after studying physical characteristic of VDMOS in detail, a differential equation concerning the electric field of the drift region is obtained, moreover, the analytical solution of this differential equation is given for the whole drift region, then the voltage drop of the drift region is obtained. The result shows that the calculation stability in the region adjacent to saturation of the drain current are improved in the paper´s model, and furthermore, the calculation prec ision of the paper´s model is high. Especially in the condition of high gate vol tage and high drain voltage it is improved to a great extent.
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References
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