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Erratum to: Folded down-conversion mixer for a 60 GHz receiver architecture in 65-nm CMOS technology

Najam Muhammad AMIN,Zhi-gong WANG,Zhi-qun LI

Frontiers of Information Technology & Electronic Engineering 2015, Volume 16, Issue 5, doi: 10.1631/FITEE.14e0087

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Analysis and design of transformer-based CMOS ultra-wideband millimeter-wave circuits for wireless applications Review Articles

Yi-ming YU, Kai KANG

Frontiers of Information Technology & Electronic Engineering 2020, Volume 21, Issue 1,   Pages 97-115 doi: 10.1631/FITEE.1900491

Abstract: In this paper, four transformer-based ultra-wideband mm-Wave circuits demonstrated in CMOS technologies

Keywords： CMOS     Millimeter-wave (mm-Wave)     Ultra-wideband     Transformer     Low-noise amplifier     Injection-locked fre-quency    

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A 9.8–30.1 GHz CMOS low-noise amplifier with a 3.2-dB noise figure using inductor- and transformer-based

Hongchen Chen, Haoshen Zhu, Liang Wu, Wenquan Che, Quan Xue,hongdoublechen@gmail.com,zhuhs@scut.edu.cn,wuliang@cuhk.edu.cn,eewqche@scut.edu.cn,eeqxue@scut.edu.cn

Frontiers of Information Technology & Electronic Engineering 2021, Volume 22, Issue 4,   Pages 586-598 doi: 10.1631/FITEE.2000510

Abstract: A 9.8–30.1 GHz (LNA) with a 3.2-dB minimum noise figure (NF) is presented. At the architecture level, a topology based on (CG) cascading with a common-source (CS) amplifier is proposed for simultaneous wideband input matching and relatively high gain. At the circuit level, multiple techniques are proposed to improve LNA performance. First, in the CG stage, loading effect is properly used instead of the conventional feedback technique, to enable simultaneous impedance and noise matching. Second, based on in-depth theoretical analysis, the inductor- and -based techniques are employed for the CG and CS stages, respectively, to enhance the gain and reduce power consumption. Third, the floating-body method, which was originally proposed to lower NF in CS amplifiers, is adopted in the CG stage to further reduce NF. Fabricated in a 65-nm technology, the LNA chip occupies an area of only 0.2 mm and measures a maximum power gain of 10.9 dB with −3 dB bandwidth from 9.8 to 30.1 GHz. The NF exhibits a minimum value of 3.2 dB at 15 GHz and is below 5.7 dB across the entire bandwidth. The LNA consumes 15.6 mW from a 1.2-V supply.

Keywords： CMOS；跨导提升技术；低噪声放大器；变压器；共栅级    

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Automated optimization technique of CMOS analog cell circuit based on symbolic analysis

Zheng Weishan,Deng Qing,Liu Zhaoxia,Shi Longxing

Strategic Study of CAE 2009, Volume 11, Issue 4,   Pages 50-56

Abstract:

A methodology for automatic design optimization of CMOS analog cell circuits

Keywords： optimization     performance equation     symbolic analysis     genetic algorithm    

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Cross-layer efforts for energy-efficient computing: towards peta operations per second perwatt Perspectives

Xiaobo Sharon HU, Michael NIEMIER

Frontiers of Information Technology & Electronic Engineering 2018, Volume 19, Issue 10,   Pages 1209-1223 doi: 10.1631/FITEE.1800466

Abstract: respect to traditional Boolean circuits and von Neumann processors, it will be challenging for beyond-CMOSdevices to compete with the CMOS technology.To take full advantage of beyond-CMOS devices, cross-layer efforts spanning from devices to circuits

Keywords： Moore’s law     Energy-efficient computing     Neural network accelerators     Beyond-CMOS devices    

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MEMS-based thermoelectric infrared sensors: A review

Dehui XU, Yuelin WANG, Bin XIONG, Tie LI

Frontiers of Mechanical Engineering 2017, Volume 12, Issue 4,   Pages 557-566 doi: 10.1007/s11465-017-0441-2

Abstract:

In the past decade, micro-electromechanical systems (MEMS)-based thermoelectric infrared (IR) sensors have received considerable attention because of the advances in micromachining technology. This paper presents a review of MEMS-based thermoelectric IR sensors. The first part describes the physics of the device and discusses the figures of merit. The second part discusses the sensing materials, thermal isolation microstructures, absorber designs, and packaging methods for these sensors and provides examples. Moreover, the status of sensor implementation technology is examined from a historical perspective by presenting findings from the early years to the most recent findings.

Keywords： thermoelectric infrared sensor     CMOS-MEMS     thermopile     micromachining     wafer-level package    

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Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor Research Article

Yang WANG, Xiangliang JIN, Jian YANG, Feng YAN, Yujie LIU, Yan PENG, Jun LUO, Jun YANG,jinxl@hunnu.edu.cn,pengyan@shu.edu.cn

Frontiers of Information Technology & Electronic Engineering 2022, Volume 23, Issue 1,   Pages 158-170 doi: 10.1631/FITEE.2000504

Abstract: gate-controlled silicon controlled rectifier (NBL-GCSCR) manufactured by the 0.18 μm standard bipolar- CMOS-DMOS

Keywords： Electric breakdown     Semiconductor device reliability     CMOS technology    

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High linearity U-band power amplifier design: a novel intermodulation point analysis method Research Article

Jie CUI, Peipei LI, Weixing SHENG,cuijie@njust.edu.cn

Frontiers of Information Technology & Electronic Engineering 2023, Volume 24, Issue 1,   Pages 176-186 doi: 10.1631/FITEE.2200082

Abstract: A ’s linearity determines the emission signal’s quality and the efficiency of the system. Nonlinear distortion can result in system bit error, out-of-band radiation, and interference with other channels, which severely influence communication system’s quality and reliability. Starting from the third-order intermodulation point of the s, the circuit’s nonlinearity is compensated for. The analysis, design, and implementation of linear class AB mm-Wave s based on GlobalFoundries 45 nm technology are presented. Three single-ended and differential stacked s have been implemented based on cascode cells and triple cascode cells operating in U-band frequencies. According to nonlinear analysis and on-wafer measurements, designs based on triple cascode cells outperform those based on cascode cells. Using single-ended measurements, the differential achieves a measured peak power-added efficiency (PAE) of 47.2% and a saturated output power () of 25.2 dBm at 44 GHz. The amplifier achieves a higher than 23 dBm and a maximum PAE higher than 25% in the measured bandwidth from 44 GHz to 50 GHz.

Keywords： CMOS silicon-on-insulator (SOI)     Linearity analysis     Milimeter wave (mm-Wave)     Power amplifier    

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Title Author Date Type Operation

Erratum to: Folded down-conversion mixer for a 60 GHz receiver architecture in 65-nm CMOS technology

Najam Muhammad AMIN,Zhi-gong WANG,Zhi-qun LI

Journal Article

Analysis and design of transformer-based CMOS ultra-wideband millimeter-wave circuits for wireless applications

Yi-ming YU, Kai KANG

Journal Article

A 9.8–30.1 GHz CMOS low-noise amplifier with a 3.2-dB noise figure using inductor- and transformer-based

Hongchen Chen, Haoshen Zhu, Liang Wu, Wenquan Che, Quan Xue,hongdoublechen@gmail.com,zhuhs@scut.edu.cn,wuliang@cuhk.edu.cn,eewqche@scut.edu.cn,eeqxue@scut.edu.cn

Journal Article

Automated optimization technique of CMOS analog cell circuit based on symbolic analysis

Zheng Weishan,Deng Qing,Liu Zhaoxia,Shi Longxing

Journal Article

Cross-layer efforts for energy-efficient computing: towards peta operations per second perwatt

Xiaobo Sharon HU, Michael NIEMIER

Journal Article

MEMS-based thermoelectric infrared sensors: A review

Dehui XU, Yuelin WANG, Bin XIONG, Tie LI

Journal Article

Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor

Yang WANG, Xiangliang JIN, Jian YANG, Feng YAN, Yujie LIU, Yan PENG, Jun LUO, Jun YANG,jinxl@hunnu.edu.cn,pengyan@shu.edu.cn

Journal Article

High linearity U-band power amplifier design: a novel intermodulation point analysis method

Jie CUI, Peipei LI, Weixing SHENG,cuijie@njust.edu.cn

Journal Article