为了满足微电子器件不断扩展到更小尺寸的需求，SiO₂栅极介电层被高介电常量材料Hf(Zr)O₂所替代，以尽可能减少流过介电薄膜的漏电流。然而，与高介电常量 (高κ) 电介质连接时，传统Si通道中的电子迁移率由于库仑散射、表面粗糙度散射、远程声子散射和介电电荷捕获而有所下降。III-V和Ge是两个有希望的候选材料，其迁移率均优于Si。尽管如此，与Si基界面相比，Hf(Zr)O₂/III-V(Ge) 的界面结合更为复杂。成功制造高质量器件关键在于优化器件界面设计时对Hf(Zr)O₂/III-V(Ge) 界面结合结构的理解与设计。因此，从原子尺度准确了解界面结合与界面态形成的机制变得尤为重要。在本文中，笔者利用第一性原理计算方法，对HfO₂与GaAs之间的界面性质进行了研究。结果表明，隙间态主要由As—As二聚物键合、Ga部分氧化( 在3+和1+之间) 和Ga—悬挂键贡献。这些研究成果能为最优化界面钝化提供重要的指导意见。

Given the demand for constantly scaling microelectronic devices to ever smaller dimensions, a SiO₂ gate dielectric was substituted with a higher dielectric-constant material, Hf(Zr)O₂, in order to minimize current leakage through dielectric thin film. However, upon interfacing with high dielectric constant (high-κ) dielectrics, the electron mobility in the conventional Si channel degrades due to Coulomb scattering, surface-roughness scattering, remote-phonon scattering, and dielectric-charge trapping. III-V and Ge are two promising candidates with superior mobility over Si. Nevertheless, Hf(Zr)O₂/III-V(Ge) has much more complicated interface bonding than Si-based interfaces. Successful fabrication of a high-quality device critically depends on understanding and engineering the bonding configurations at Hf(Zr)O₂/III-V(Ge) interfaces for the optimal design of device interfaces. Thus, an accurate atomic insight into the interface bonding and mechanism of interface gap states formation becomes essential. Here, we utilize first-principle calculations to investigate the interface between HfO₂ and GaAs. Our study shows that As−As dimer bonding, Ga partial oxidation (between 3+ and 1+) and Ga− dangling bonds constitute the major contributions to gap states. These findings provide insightful guidance for optimum interface passivation.