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Replica bit-line (RBL) delay 1

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Multi-stage dual replica bit-line delay technique for process-variation-robust timing of lowvoltageSRAMsense

Shou-biao TAN,Wen-juan LU,Chun-yu PENG,Zheng-ping LI,You-wu TAO,Jun-ning CHEN

Frontiers of Information Technology & Electronic Engineering 2015, Volume 16, Issue 8, Pages 700-706 doi: 10.1631/FITEE.1400439

Abstract: A multi-stage dual replica bit-line delay (MDRBD) technique is proposed for reducing access time by suppressingstatistical theory, reduces the timing variation by using multi-stage ideas, meanwhile doubling the replica

Keywords： Process-variation-robust Sense amplifier (SA) Replica bit-line (RBL) delay Timing variation

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Creating technical heritage object replicas in a virtual environment

Olga EGOROVA,Dmitry SHCHERBININ

Frontiers of Mechanical Engineering 2016, Volume 11, Issue 1, Pages 108-115 doi: 10.1007/s11465-016-0363-4

Abstract:

The paper presents innovative informatics methods for creating virtual technical heritage replicas, which are of significant scientific and practical importance not only to researchers but to the public in general. By performing 3D modeling and animation of aircrafts, spaceships, architectural-engineering buildings, and other technical objects, the process of learning is achieved while promoting the preservation of the replicas for future generations. Modern approaches based on the wide usage of computer technologies attract a greater number of young people to explore the history of science and technology and renew their interest in the field of mechanical engineering.

Keywords： 3D document history of science and technology technical knowledge popularization virtual environment replica