Frontiers of Information Technology & Electronic Engineering
>> 2022,
Volume 23,
Issue 1
doi:
10.1631/FITEE.2000504
Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor
Affiliation(s): School of Physics and Electronics, Hunan Normal University, Changsha 410081, China; School of Mechatronic Engineering and Automation, Shanghai University, Shanghai 200444, China; Faculty of Engineering, Western University, London, ON N6A 3K7, Canada; less
Received: 2020-09-27
Accepted: 2022-01-24
Available online: 2022-01-24
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Abstract
The input/output (I/O) pins of an industry-level fluorescent optical fiber temperature sensor readout circuit need on-chip integrated high-performance electro-static discharge (ESD) protection devices. It is difficult for the failure level of basic N-type buried layer gate-controlled silicon controlled rectifier (NBL-GCSCR) manufactured by the 0.18 μm standard bipolar- CMOS-DMOS (BCD) process to meet this need. Therefore, we propose an on-chip integrated novel deep N-well gate-controlled SCR (DNW-GCSCR) with a high failure level to effectively solve the problems based on the same semiconductor process. Technology computer-aided design (TCAD) simulation is used to analyze the device characteristics. SCRs are tested by transmission line pulses (TLP) to obtain accurate ESD parameters. The holding voltage (24.03 V) of NBL-GCSCR with the longitudinal bipolar junction transistor (BJT) path is significantly higher than the holding voltage (5.15 V) of DNW-GCSCR with the lateral SCR path of the same size. However, the failure current of the NBL-GCSCR device is 1.71 A, and the failure current of the DNW-GCSCR device is 20.99 A. When the gate size of DNW-GCSCR is increased from 2 μm to 6 μm, the holding voltage is increased from 3.50 V to 8.38 V. The optimized DNW-GCSCR (6 μm) can be stably applied on target readout circuits for on-chip electrostatic discharge protection.
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