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Frontiers of Information Technology & Electronic Engineering >> 2021, Volume 22, Issue 8 doi: 10.1631/FITEE.2000323
A BCH error correction scheme applied to FPGA with embedded memory
Affiliation(s): National Key Laboratory for Electronic Measurement Technology, North University of China, Taiyuan 030051, China; Shandong Aerospace Electronic Technology Institute, Yantai 264000, China; less
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Keywords
纠错算法 ; Bose–Chaudhuri–Hocquenghem(BCH)码 ; 现场可编程门阵列(FPGA) ; 闪存
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